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S Dwarkadas

Publications and source records attributed to S Dwarkadas.

2 recordsLinked to original sources

Integrating parallelization strategies for linkage analysis.

We describe a second parallel implementation of the ILINK program from the LINKAGE package that improves on our previous implementation. To improve running time we integrated the strategy of parallel estimation of the gradient at a candidate recombination fraction vector with a previously implemented strategy for evaluating in parallel the likelihood at one vector. We also integrated an adaptive loadbalancing strategy in conjunction with our previous static loadbalancing strategy. We implemented a strategy for partitioning input pedigrees, but this slowed down the program; we give some evidence for what the problems are. To best exploit parallelism at all levels of the program and to take advantage of both coarse-grain and fine-grain parallelism it is necessary to combine multiple algorithmic strategies.

Algorithms

Parallelization of general-linkage analysis problems.

We describe a parallel implementation of a genetic-linkage analysis program that achieves good speed improvement, even for analyses on a single pedigree and with a single starting recombination fraction vector. Our parallel implementation has been run on three different platforms: an Ethernet network of workstations, a higher-bandwidth asynchronous transfer mode (ATM) network of workstations, and a shared-memory multiprocessor. The same program, written in a shared-memory programming style, is used on all platforms. On the workstation networks, the hardware does not provide shared memory, so the program executes on a distributed shared memory system that implements shared memory in software. These three platforms represent different points on the price/performance scale. Ethernet networks are cheap and omnipresent, ATM networks are an emerging technology that offers higher bandwidth, and shared-memory multiprocessors offer the best performance because communication is implemented entirely by hardware. On 8 processors and for the longer runs, we achieve speedups between 3.5 and 5 on the Ethernet network and between 4.8 and 6 on the ATM network. On the shared-memory multiprocessor, we achieve speedups in the 5.5-6.5 range for all runs.

Algorithms