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Results for “COMPUTERS, ANALOG”

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At least 433 records · Page 24Linked to original sources
PubMed1994

Real-time multichannel abdominal fetal ECG monitor using digital signal coprocessor.

A real-time multichannel fetal ECG monitor based on a personal computer (PC) and a MOTOROLA DSP56001 Digital Signal CoProcessor (DSP) is introduced. The DSP board is plugged into the PC, which functions as a HOST computer. An analog 8 Leads Interface and Analog to Digital circuits module is connected to the DSP through a synchronous, optical-isolated communication channel. The fetal ECG detection is based on a cross-correlation technique. An averaged maternal ECG waveform is generated using a cross-correlation alignment procedure and a user-defined template. The fetal ECG signals present in the maternal waveform is suppressed during the averaging procedure, since both are uncorrelated. The average maternal ECG waveform is then subtracted from the abdominal real time signals, and maternal-free fetal ECGs signals are obtained, including fetal QRS complexes that coincide with maternal ones. Using the abdominal ECGs signals after subtraction, an averaged fetal waveform is generated. The maternal and the fetal heart rate are calculated during the process. The algorithm described above can be performed in real time on up to eight abdominal ECG traces by the DSP, and the desired results are passed to the HOST PC, to be stored and displayed. Electrodes positioning procedures for detecting the fetal QRS complexes with the best signal to noise ratio are not needed. Using the multichannel system, the user can select the best channel for fetal QRS detection, and accurate results for the heart rate signal are obtained. Averaged fetal waveforms are obtained from all the leads.

Abdomen↗
PubMed1986

A method for reducing the noise generated in digitizing or analog recording of EEG data.

Magnetic recording and/or analog-to-digital conversion add noise to the data. This paper describes a method for reducing the noise added to EEG data by recording and digitizing. A linear filter is described which pre-emphasizes the EEG before recording or digitizing; a second filter then recovers the original signal after playback. The technique can result in a factor of 10 (20 dB) improvement of the signal-to-noise ratio of high frequency EEG components.

Analog-Digital Conversion↗
PubMed1978

Automatic REM detection: modifications on an existing system and preliminary normative data.

This paper describes hardware changes and additions to a previously reported sleep rapid eye movement (REM) automatic detection system. Specifically, it describes the design philosophy of a new and optimum analogue bandpass prefilter, new detection criteria based on a detailed study of the waveform distortion due to AC coupling and bandpass prefiltering and the implementation of an artifact detection system for a more accurate detection of seemingly REM-related electro-oculographic (EOG) waveforms. Preliminary normative data on phasic REM patterns from young adults, detected by the described system, are also presented.

Computers, Analog↗
PubMed1975

Simple method for automating the differential leucocyte-count.

A simple method is described for analysing leucocyte-volume distribution curves to obtain a differential leucocyte-count. The results derived by this method agree well with the differential counts obtained by microscopical examination of the stained blood-film.

Automation↗
PubMed1972

Quantitative electromyography: a new analogue technique for detecting changes in action potential duration.

An automatic method using an analogue analyser is described for obtaining an index which is based on the mean phase duration of an EMG signal. This method gives similar values for motor unit action potential duration to an alternative digital method of analysis based on the distribution of time intervals between zero crossings of the EMG signal. The analysis has been found to give good discrimination of normal and myopathic EMG signals.

Action Potentials↗
PubMed2001

Analogue VLSI for probabilistic networks and spike-time computation.

The history and some of the methods of analogue neural VLSI are described. The strengths of analogue techniques are described, along with residual problems to be solved. The nature of hardware-friendly and hardware-appropriate algorithms is reviewed and suggestions are offered as to where analogue neural VLSI's future lies.

Algorithms↗
PubMed1993

A hardware efficient cascadable chip set for ANN's with on-chip backpropagation.

In this paper, an analogue, cascadable, CMOS chip set for artificial neural networks is presented. The chip set (a synapse chip and a neuron chip) offer on-chip back-propagation learning in a fully parallel, layered, feedforward network of arbitrary size and topology. The learning scheme is implemented with no extra circuits at the synapse sites (compared to the system without the learning scheme) and extra circuits of a complexity only about the same as the neurons at the neuron sites. Also, no additional wiring is required by the learning scheme. Measurements on an experimental chip set are presented.

Algorithms↗
PubMed1993

Analogue synaptic noise--implications and learning improvements.

We analyse the effects of analogue noise on the synaptic arithmetic during multilayer perceptron training by expanding the cost function to include noise-mediated penalty terms. Predictions are made in the light of these calculations which suggest that fault tolerance, generalisation ability and learning trajectory should be improved by such noise-injection. Extensive simulation experiments on two distinct classification problems substantiate the claims. The results appear to be perfectly general for all training schemes where weights are adjusted incrementally, and have wide-ranging implications for all applications, particularly those involving "inaccurate" analogue neural VLSI.

Algorithms↗
PubMedDate not supplied

The prospects for analogue neural VLSI.

In recent years, the efforts of analogue, neural-hardware designers have shifted from generic analogue neurocomputers to "niche" markets in sensor fusion and robotics, and we explain why this is so. We describe the main differences between digital and analogue computation, and consider the advantages of pure analogue and pulsed methods of design. We then investigate some important issues in analogue design of neural machines, namely weight storage (volatile and non-volatile), on-chip learning, and arithmetic accuracy and its relationship to noise. Finally, we outline those areas in which analogue techniques are likely to prove most useful, and speculate as to their likely long-term utility.

Computers, Analog↗
PubMed1999

SPIKEII: an integrate-and-fire AVLSI chip.

We present the SPIKEII chip, an integrate-and-fire neural network chip with programmable synapses implemented in analogue VLSI. It is the successor to the SPIKEI chip. We describe the circuitry, and show some results using networks of integrate-and-fire neurons.

Action Potentials↗